TY  - BOOK
AU  - Uyemura,John P.
TI  - Chip design for submicron VLSI CMOS layout and simulation
SN  - 053446629x
PY  - 2006///
CY  - Toronto
PB  - Thomson/Nelson
KW  - Integrated circuits
KW  - Very large scale integration
KW  - Metal oxide semiconductors, Complementary
KW  - Design and construction
N1  - includes index p.407 - 411; Includes bibliographical references
ER  -