Modeling, Synthesis, And Rapid Prototyping With The Verilog HDL (Record no. 107284)
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000 -LEADER | |
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fixed length control field | 00571nam a2200169 4500 |
001 - CONTROL NUMBER | |
control field | 0000005007 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 231118s9999 xx 000 0 und d |
020 00 - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 0139773983 |
040 ## - CATALOGING SOURCE | |
Original cataloging agency | Politeknik Johor Bahru |
090 0# - LOCALLY ASSIGNED LC-TYPE CALL NUMBER (OCLC); LOCAL CALL NUMBER (RLIN) | |
Classification number (OCLC) (R) ; Classification number, CALL (RLIN) (NR) | TK7885.7 |
Local cutter number (OCLC) ; Book number/undivided call number, CALL (RLIN) | C55 1999 |
100 00 - MAIN ENTRY--PERSONAL NAME | |
Personal name | Ciletti, Michael D. |
245 00 - TITLE STATEMENT | |
Title | Modeling, Synthesis, And Rapid Prototyping With The Verilog HDL |
Statement of responsibility, etc. | Michael D Ciletti |
260 00 - PUBLICATION, DISTRIBUTION, ETC. | |
Place of publication, distribution, etc. | New Jersey |
Name of publisher, distributor, etc. | Prentice Hall |
Date of publication, distribution, etc. | 1999 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xxii, 727p. |
Other physical details | ill. |
Dimensions | 24cm. |
500 00 - GENERAL NOTE | |
General note | includes index : p. 710 - 724 |
650 00 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | Verilog ( computer Hardware description language) |
Withdrawn status | Lost status | Damaged status | Not for loan | Collection | Home library | Current library | Date acquired | Cost, normal purchase price | Total Checkouts | Full call number | Barcode | Date last seen | Cost, replacement price | Price effective from | Koha item type |
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Book | PERPUSTAKAAN POLITEKNIK IBRAHIM SULTAN | PERPUSTAKAAN POLITEKNIK IBRAHIM SULTAN | 03/03/2008 | 372.00 | TK7885.7 C55 1999 | 0000034347 | 18/11/2023 | 372.00 | 18/11/2023 | Open Shelf |